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DMA Connections
AHB Bus Matrix
DMA request mapping
DMA1
| Stream 0 | Stream 1 | Stream 2 | Stream 3 | Stream 4 | Stream 5 | Stream 6 | Stream 7 | |
|---|---|---|---|---|---|---|---|---|
| Channel 0 | SPI3 RX | SPI3 RX | SPI2 RX | SPI2 TX | SPI3 TX | SPI3 TX | ||
| Channel 1 | I2C1 RX | TIM7 Up | TIM7 Up | I2C1 RX | I2C1 TX | I2C1 TX | ||
| Channel 2 | TIM4 Ch. 1 | I2S3 Ext RX | TIM4 Ch. 2 | I2S2 Ext TX | I2S3 Ext TX | TIM4 Up | TIM4 Ch. 3 | |
| Channel 3 | I2S3 Ext RX | TIM2 Up TIM2 Ch. 3 | I2C3 RX | I2S2 Ext RX | I2C3 TX | TIM2 Ch. 1 | TIM2 Ch. 2 TIM2 Ch. 4 | TIM2 Up TIM2 Ch. 4 |
| Channel 4 | UART5 RX | USART3 RX | UART4 RX | USART3 TX | UART4 TX | USART2 RX | USART2 TX | UART5 TX |
| Channel 5 | UART8 TX | UART7 TX | TIM3 Ch. Up TIM3 Ch. 4 | UART7 RX | TIM3 TRG TIM3 Ch. 1 | TIM3 Ch. 2 | UART8 RX | TIM3 Ch. 3 |
| Channel 6 | TIM5 Up TIM5 Ch. 3 | TIM5 TRG TIM5 Ch. 4 | TIM5 Ch. 1 | TIM5 TRG TIM5 Ch. 4 | TIM5 Ch. 2 | TIM5 Up | ||
| Channel 7 | TIM6 Up | I2C2 RX | I2C2 RX | USART3 TX | DAC1 | DAC2 | I2C2 TX |