Differences

This shows you the differences between two versions of the page.

Link to this comparison view

Both sides previous revision Previous revision
Next revision
Previous revision
stm32:peripherals:timer_base [2022/12/27 17:50] – [Programming Example] ruanstm32:peripherals:timer_base [2023/10/19 09:49] (current) frtt
Line 5: Line 5:
 ===== Configuration Registers ===== ===== Configuration Registers =====
  
-==== CR1 - Configuration register 1 ==== +==== TIMx_CR1 - Configuration register 1 ====
- +
  
 \\ {{timer_reg_cr1.svg}} \\ \\ \\ {{timer_reg_cr1.svg}} \\ \\
Line 19: Line 17:
 |:::|1|Counter enabled| |:::|1|Counter enabled|
 //*This bit is readonly in center-aligned or encoder mode// \\ //*This bit is readonly in center-aligned or encoder mode// \\
-==== DIER - DMA / Interrupt enable register ====+ 
 +==== TIMx_DIER - DMA / Interrupt enable register ====
  
 \\ {{timer_reg_dier.svg}} \\ \\ \\ {{timer_reg_dier.svg}} \\ \\
Line 31: Line 30:
 |:::|1|Update interrupt enabled| |:::|1|Update interrupt enabled|
  
-==== SMCR - Slave mode control register ====+==== TIMx_SMCR - Slave mode control register ====
  
 \\ {{timer_reg_smcr.svg}} \\ \\ \\ {{timer_reg_smcr.svg}} \\ \\
Line 55: Line 54:
 |:::|011|Encoder mode 3|111|External clock mode 1| |:::|011|Encoder mode 3|111|External clock mode 1|
  
-==== PSC - Prescaler register ====+==== TIMx_PSC - Prescaler register ====
  
 \\ {{timer_reg_psc.svg}} \\ \\ \\ {{timer_reg_psc.svg}} \\ \\
  
-==== ARR - Auto reload register ====+==== TIMx_ARR - Auto reload register ====
  
 \\ {{timer_reg_arr.svg}} \\ \\ \\ {{timer_reg_arr.svg}} \\ \\
Line 65: Line 64:
 ===== Data Registers ===== ===== Data Registers =====
  
-==== CNT - Count register ====+==== TIMx_CNT - Count register ====
  
 \\ {{timer_reg_cnt.svg}} \\ \\ \\ {{timer_reg_cnt.svg}} \\ \\
Line 79: Line 78:
  
 /* configure timer */ /* configure timer */
-TIM2->PSC = 84000u - 1u;              /* Counting with f = 84MHz / 84000 1kHz */ +TIM2->PSC = 0u;              /* Counting with f = 84MHz / 84MHz */ 
-TIM2->ARR = 512u;                     /* Count to 512 */+TIM2->ARR = 84000u - 1u;                     /* Count to 84000 */
  
 TIM2->CR1 |= (0x1 << 0u);             /* Start timer */ TIM2->CR1 |= (0x1 << 0u);             /* Start timer */
 </code> </code>
 \\ \\
  • stm32/peripherals/timer_base.1672163428.txt.gz
  • Last modified: 2022/12/27 17:50
  • by ruan