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stm32:peripherals:timer_base [2016/11/21 06:45] – [Programming Example] feurstm32:peripherals:timer_base [2023/10/19 09:49] (current) – frtt
Line 2: Line 2:
  
 \\ {{timer_base.svg}} \\ \\ \\ {{timer_base.svg}} \\ \\
- 
-===== Programming Example ===== 
- 
-The code snippet bellow shows how to configure and use a GPIO pin as input. 
- 
-<code c> 
-#include "reg_stm32f4xx.h" 
- 
-RCC->APB1ENR |= (0x1 << 0u);          /* Enable TIM2 clock. */ 
- 
-/* configure timer */ 
-TIM2->PSC = 84000u - 1u;              /* Counting with f = 84MHz / 84000 = 1MHz */ 
-TIM2->ARR = 512u;                     /* Count to 512 */ 
- 
-TIM2->CR1 |= (0x1 << 0u);             /* Start timer */ 
-</code> 
-\\ 
- 
-> {{logo_hal.svg?72px |}} **Hardware Abstraction Layer** 
-> [[https://ennis.zhaw.ch/hal/structreg__tim__t.html | Register Types]] 
-> [[https://ennis.zhaw.ch/hal/hal__timer_8h.html | InES Timer HAL Interface]] 
-\\ 
  
 ===== Configuration Registers ===== ===== Configuration Registers =====
  
-==== CR1 ==== +==== TIMx_CR1 - Configuration register 1 ====
- +
-Configuration register 1+
  
 \\ {{timer_reg_cr1.svg}} \\ \\ \\ {{timer_reg_cr1.svg}} \\ \\
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 |:::|1|Counter enabled| |:::|1|Counter enabled|
 //*This bit is readonly in center-aligned or encoder mode// \\ //*This bit is readonly in center-aligned or encoder mode// \\
-==== DIER ==== 
  
-DMA / Interrupt enable register+==== TIMx_DIER - DMA / Interrupt enable register ====
  
 \\ {{timer_reg_dier.svg}} \\ \\ \\ {{timer_reg_dier.svg}} \\ \\
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 |UDE|0|Update DMA request disabled (reset state)| |UDE|0|Update DMA request disabled (reset state)|
 |:::|1|Update DMA request enabled| |:::|1|Update DMA request enabled|
 +|CC1IE|0|CC1 interrupt disabled (reset state)|
 +|:::|1|CC1 interrupt enabled|
 |UIE|0|Update interrupt disabled (reset state)| |UIE|0|Update interrupt disabled (reset state)|
 |:::|1|Update interrupt enabled| |:::|1|Update interrupt enabled|
  
-==== SMCR ==== +==== TIMx_SMCR - Slave mode control register ====
- +
-Slave mode control register+
  
 \\ {{timer_reg_smcr.svg}} \\ \\ \\ {{timer_reg_smcr.svg}} \\ \\
  
 |< 100% 5em 5em 20em 5em >| |< 100% 5em 5em 20em 5em >|
 +|ECE|0|External clock mode 2 disabled (reset state)||
 +|:::|1|External clock mode 2 enabled. Clock enabled by any active edge on ETRF||
 +|ETF|0000|No filter, f<sub>DTS</sub> (reset state)|1000|f<sub>sampling</sub> => f<sub>DTS</sub> / 8, N=6|
 +|:::|0001|f<sub>sampling</sub> => f<sub>CKINT</sub>, N=2|1001|f<sub>sampling</sub> => f<sub>DTS</sub> / 8, N=8|
 +|:::|0010|f<sub>sampling</sub> => f<sub>CKINT</sub>, N=4|1010|f<sub>sampling</sub> => f<sub>DTS</sub> / 16, N=5|
 +|:::|0011|f<sub>sampling</sub> => f<sub>CKINT</sub>, N=8|1011|f<sub>sampling</sub> => f<sub>DTS</sub> / 16, N=6|
 +|:::|0100|f<sub>sampling</sub> => f<sub>DTS</sub> / 2, N=6|1100|f<sub>sampling</sub> => f<sub>DTS</sub> / 16, N=8|
 +|:::|0101|f<sub>sampling</sub> => f<sub>DTS</sub> / 2, N=8|1101|f<sub>sampling</sub> => f<sub>DTS</sub> / 32, N=5|
 +|:::|0110|f<sub>sampling</sub> => f<sub>DTS</sub> / 4, N=6|1110|f<sub>sampling</sub> => f<sub>DTS</sub> / 32, N=6|
 +|:::|0111|f<sub>sampling</sub> => f<sub>DTS</sub> / 4, N=8|1111|f<sub>sampling</sub> => f<sub>DTS</sub> / 32, N=8|
 +|TS |000|Internal Trigger 0 (ITR0) (reset state)|100| TI1 Edge Detector (TI1F_ED)|
 +|:::|001|Internal Trigger 1 (ITR1)|101|Filtered Timer Input 1 (TI1FP1)|
 +|:::|010|Internal Trigger 2 (ITR2)|110| Filtered Timer Input 2 (TI2FP2)|
 +|:::|011|Internal Trigger 3 (ITR3)|111|External Trigger input (ETRF)|
 |SMS|000|Slave mode disabled (reset state)|100|Reset mode| |SMS|000|Slave mode disabled (reset state)|100|Reset mode|
 |:::|001|Encoder mode 1|101|Gated mode| |:::|001|Encoder mode 1|101|Gated mode|
 |:::|010|Encoder mode 2|110|Trigger mode| |:::|010|Encoder mode 2|110|Trigger mode|
 |:::|011|Encoder mode 3|111|External clock mode 1| |:::|011|Encoder mode 3|111|External clock mode 1|
-|ECE|0|External clock mode 2 disabled (reset state)|| 
-|:::|1|External clock mode 2 enabled. Clock enabled by any active edge on ETRF|| 
- 
-==== PSC ==== 
  
-Prescaler register+==== TIMx_PSC - Prescaler register ====
  
 \\ {{timer_reg_psc.svg}} \\ \\ \\ {{timer_reg_psc.svg}} \\ \\
  
-==== ARR ==== +==== TIMx_ARR - Auto reload register ====
- +
-Auto reload register+
  
 \\ {{timer_reg_arr.svg}} \\ \\ \\ {{timer_reg_arr.svg}} \\ \\
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 ===== Data Registers ===== ===== Data Registers =====
  
-==== CNT ==== +==== TIMx_CNT - Count register ====
- +
-Count register+
  
 \\ {{timer_reg_cnt.svg}} \\ \\ \\ {{timer_reg_cnt.svg}} \\ \\
  
-===== Legend =====+===== Programming Example ===== 
 + 
 +The code snippet below shows how to configure and use a timer. 
 + 
 +<code c> 
 +#include "reg_stm32f4xx.h"
  
-\\ {{legende.svg}} \\ \\+RCC->APB1ENR |= (0x1 << 0u);          /* Enable TIM2 clock. */ 
 + 
 +/* configure timer */ 
 +TIM2->PSC = 0u;              /* Counting with f = 84MHz / 1 = 84MHz */ 
 +TIM2->ARR = 84000u - 1u;                     /* Count to 84000 */ 
 + 
 +TIM2->CR1 |= (0x1 << 0u);             /* Start timer */ 
 +</code> 
 +\\
  • stm32/peripherals/timer_base.1479710750.txt.gz
  • Last modified: 2016/11/21 06:45
  • by feur