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stm32:peripherals:dma_connection [2016/09/22 11:41] – feur | stm32:peripherals:dma_connection [2022/12/28 07:53] (current) – [Periphery/Memory Interface] ruan | ||
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====== DMA Connections ====== | ====== DMA Connections ====== | ||
- | ===== AHB Bus Matrix ===== | + | Each DMA controller is connected to the rest of the system in a different way. \\ |
+ | For memory to memory transfers you should use the DMA controller 2! \\ | ||
- | \\ {{ahb_bus_matrix.png?700em}} \\ \\ | + | \\ {{dma1_matrix.svg?350em}} {{dma2_matrix.svg? |
- | ===== DMA request mapping ===== | ||
- | ==== DMA1 ==== | + | ===== DMA controller 1 ===== |
+ | |||
+ | ==== Peripheral Interface ==== | ||
+ | |||
+ | On the peripheral interface the following marked peripherals are accessible. \\ | ||
+ | The <color red> | ||
+ | |||
+ | \\ {{dma1_periphery.svg? | ||
|< 100% 7em >| | |< 100% 7em >| | ||
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^ Channel 7 | | TIM6 Up | I2C2 RX | I2C2 RX | USART3 TX | DAC1 | DAC2 | I2C2 TX | | ^ Channel 7 | | TIM6 Up | I2C2 RX | I2C2 RX | USART3 TX | DAC1 | DAC2 | I2C2 TX | | ||
- | ==== DMA2 ==== | + | ==== Memory Interface |
+ | |||
+ | On the memory interface the following marked peripherals are accessible. \\ | ||
+ | |||
+ | \\ {{dma1_memory.svg? | ||
+ | |||
+ | ===== DMA controller 2 ===== | ||
+ | |||
+ | ==== Peripheral/ | ||
+ | |||
+ | This DMA controller can access the same peripherals on the memory interface as on the peripheral interface. \\ | ||
+ | The <color red> | ||
+ | |||
+ | \\ {{dma2_mem_per.svg? | ||
|< 100% 7em >| | |< 100% 7em >| |