Differences

This shows you the differences between two versions of the page.

--- stm32:peripherals:dac [2016/03/01 13:19] – created feur
+++ stm32:peripherals:dac [2022/12/28 08:14] (current) – ruan
@@ Line 13: / Line 13: @@
 \\
-===== Programming Example =====
 ===== Configuration Register =====
+==== DAC_CR ====
+\\ {{dac_reg_cr.svg}} \\ \\
+|< 100% 5em 5em 20em 5em >|
+|ENx|0|Disable DAC channel x (reset state)|||
+|:::|1|Enable DAC channel x|||
+|TENx|0|Disable Trigger of channel x (reset state)|||
+|:::|1|Enable Trigger of channel x|||
+|TSELx|000|Trigger: TIM6 TRGO event (reset state)|100|Trigger: TIM2 TRGO event|
+|:::|001|Trigger: TIM8 TRGO event|101|Trigger: TIM4 TRGO event|
+|:::|010|Trigger: TIM7 TRGO event|110|Trigger: EXTI line 9|
+|:::|011|Trigger: TIM5 TRGO event|111|Trigger: software|
+|DMAENx|0|Disable DMA of channel x (reset state)|||
+|:::|1|Enable DMA of channel x|||
 ===== Status Register =====
+==== DAC_SR ====
+\\ {{dac_reg_sr.svg}} \\ \\
+|< 100% 5em >|
+|DMAUDRx|0|No DMA underrun error of channel x occured|
+|:::|1|DMA underrun error of channel x occured|
+* Writing 1 to clear flag. \\ \\
 ===== Data Registers =====
+==== DAC_DHR8Rx - DHR8R1, DHR8R2 and DHR8RD registers ====
+\\ {{dac_reg_dhr8r_.svg}} \\ \\
+==== DAC_DHR12Rx - DHR12R1, DHR12R2 and DHR12RD registers ====
+\\ {{dac_reg_dhr12r_.svg}} \\ \\
+==== DAC_DHR12Lx - DHR12L1, DHR12L2 and DHR12LD registers ====
+\\ {{dac_reg_dhr12l_.svg}} \\ \\
+==== DAC_DORx - Data output register ====
-===== Legend =====
+\\ {{dac_reg_dor_.svg}} \\ \\
-\\ {{legend.svg]] \\ \\