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| Both sides previous revision Previous revision Next revision | Previous revision | ||
| ctboard:peripherals:gpio [2016/02/11 06:45] – feur | ctboard:peripherals:gpio [2017/08/29 09:19] (current) – [GPIO] ruan | ||
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| - | FIXME | ||
| ====== GPIO ====== | ====== GPIO ====== | ||
| - | The CT Board offers on the 4 general | + | The CT Board offers on the 4 general |
| - | * 4 general | + | * 4 general |
| * 32 memory mapped output pins | * 32 memory mapped output pins | ||
| * 32 memory mapped input pins | * 32 memory mapped input pins | ||
| - | * 2 general | + | * 2 general |
| - | * External interface to SRAM bus. | + | * External interface to [[memory_bus|SRAM bus]]. |
| + | \\ | ||
| - | ===== GPIO over CPLD ===== | + | ===== Functions |
| - | Each of the 4 GPIO ports contains 8 ouput and 8 input pins. The ports are not as fast as the integrated [[stm32:peripherals: | + | These modes are available: |
| - | > {{ctboard_mode_1.svg?48px }} Please make sure the CT Board is in the correct mode. | + | * [[gpio_cpld|GPIO over CPLD]] for input / output on ports P1..4. |
| - | > Supported | + | |
| - | ==== Registers ==== | ||
| - | |||
| - | === Input === | ||
| - | |||
| - | \\ {{ctboard_gpio_input_reg.svg}} \\ \\ | ||
| - | |||
| - | === Output === | ||
| - | |||
| - | The Registers are read / write. | ||
| - | |||
| - | \\ {{ctboard_gpio_output_reg.svg}} \\ \\ | ||
| - | |||
| - | ==== Diagram ==== | ||
| - | |||
| - | \\ {{ctboard_gpio_cpld.svg}} \\ \\ | ||
| - | \\ {{ ctboard_gpio_pinout.svg? | ||
| - | |||
| - | ===== GPIO over MCU ===== | ||
| - | |||
| - | These two ports are directly connected to the [[stm32: | ||
| - | All [[stm32: | ||
| - | |||
| - | > {{ctboard_mode_no.svg? | ||
| - | > Supported modes: Available in all modes. | ||
| - | |||
| - | ==== Diagram ==== | ||
| - | |||
| - | > Only pins 0..11 are connected to P5 / P6! The other 4 pins are used for 5V, 3.3V and GND. | ||
| - | |||
| - | \\ {{ctboard_gpio_stm32.svg}} \\ \\ | ||
| - | |||
| - | ===== External Memory Bus ===== | ||
| - | |||
| - | The CT Board is connected to the microcontroller over SRAM interface. This interface is also available on ports P1..4. \\ \\ | ||
| - | |||
| - | ==== Full Bus ==== | ||
| - | |||
| - | The full interface is connected. \\ \\ | ||
| - | |||
| - | > {{ctboard_mode_2.svg? | ||
| - | > Supported modes: **2**. | ||
| - | |||
| - | === Pin Out === | ||
| - | |||
| - | \\ {{ctboard_gpio_stm32_reg.svg}} \\ \\ | ||
| - | |||
| - | ==== Visualization on Oscilloskope ==== | ||
| - | |||
| - | For educational purpouse there is a mode to visualize the bus on a oscilloskope. \\ | ||
| - | The ports are specially configured to directly plug in the logic probe of a Tektronix logic analyzer. \\ \\ | ||
| - | |||
| - | > {{ctboard_mode_3.svg? | ||
| - | > Supported modes: **3**. | ||
| - | |||
| - | \\ {{ ctboard_gpio_probe.svg? | ||
| - | |||
| - | === Pin Out === | ||
| - | |||
| - | \\ {{ctboard_gpio_probe_reg.svg}} \\ \\ | ||