Differences

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--- ctboard:peripherals:dipsw [2016/01/26 10:29] – feur
+++ ctboard:peripherals:dipsw [2022/12/27 16:38] (current) – [Registers] ruan
@@ Line 1: / Line 1: @@
-====== GPIO ======
+====== DIPSW ======
-On the CT Board are 32 DIP switches mounted. They are arranged in 4 groups of 8 DIP switches. \\
+The CT Board features 32 DIP switches. They are arranged in 4 groups of 8 DIP switches. \\
 If a DIP switch is in the position "high" (see [[#diagram]] below) it provides a logical **"1"**. \\ \\
-> {{ctboard_mode_1.svg?48px }} {{ctboard_mode_2.svg?48px }} {{ctboard_mode_3.svg?48px }} Please make sure the CT Board is in the correct mode.
+> {{ctboard:ctboard_mode_1.svg?48px }} {{ctboard:ctboard_mode_2.svg?48px }} {{ctboard:ctboard_mode_3.svg?48px }} {{ctboard:ctboard_mode_4.svg?48px }} Please make sure the CT Board is in the correct mode.
-> Supported modes: **1**, **2**, **3**
+> Supported [[ctboard:mode_switch|modes]]: **1**, **2**, **3**, **4**
+\\
 ===== Registers =====
-The Registers are read only.
+The registers are read only.
-|< 100% 10em >|
+\\ {{ctboard_dipsw_reg.svg}} \\ \\
-^  Address  ^  Bit 7  ^  Bit 6  ^  Bit 5  ^  Bit 4  ^  Bit 3  ^  Bit 2  ^  Bit 1  ^  Bit 0  ^
-^  0x6000'0200  |  S7  |  S6  |  S5  |  S4  |  S3  |  S2  |  S1  |  S0  |
-^  0x6000'0201  |  S15  |  S14  |  S13  |  S12  |  S11  |  S10  |  S9  |  S8  |
-^  0x6000'0202  |  S23  |  S22  |  S21  |  S20  |  S19  |  S18  |  S17  |  S16  |
-^  0x6000'0203  |  S31  |  S30  |  S29  |  S28  |  S27  |  S26  |  S25  |  S24  |
 ===== Diagram =====
-\\ {{:ctboard:peripherals:ctboard_dipsw.svg?800em}} \\ \\
+\\ {{:ctboard:peripherals:ctboard_dipsw.svg?700em}} \\ \\
+===== Programming Example =====
+The code snippets below show how to use the DIPSW.
+<code c>
+#include "reg_ctboard.h"
+uint8_t data_byte = CT_DIPSW->BYTE.S7_0;       /* Read byte from S7..0. */
+uint16_t data_hword = CT_DIPSW->HWORD.S31_16;  /* Read half word from S31..16. */
+uint32_t data_word = CT_DIPSW->WORD;           /* Read all DIPSW at once into a word. */
+</code>
+\\
+<code asm>
+ADDR_DIPSW      EQU      0x60000200
+                LDR      r0, =ADDR_DIPSW
+                LDRB     r1, [r0, #0]          ; Read byte from S7..0.
+                LDRH     r1, [r0, #2]          ; Read half word from S31..16.
+                LDR      r1, [r0, #0]          ; Read all DIPSW at once into a word.
+</code>
+\\