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| Both sides previous revision Previous revision Next revision | Previous revision | ||
| ctboard:peripherals:dipsw [2016/01/26 10:20] – feur | ctboard:peripherals:dipsw [2022/12/27 16:38] (current) – [Registers] ruan | ||
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| Line 1: | Line 1: | ||
| - | ====== | + | ====== |
| - | On the CT Board are 32 DIP switches | + | The CT Board features |
| - | If a DIP switch is in the position " | + | If a DIP switch is in the position " |
| - | > {{ctboard_mode_1.svg? | + | > {{ctboard:ctboard_mode_1.svg? |
| - | > Supported modes: **1**, **2**, **3** | + | > Supported |
| - | > (P10, between GPIO Port P3/4) | + | \\ |
| ===== Registers ===== | ===== Registers ===== | ||
| - | |< 100% 10em >| | + | The registers are read only. |
| - | ^ Offset | + | |
| - | | **0x200** | + | \\ {{ctboard_dipsw_reg.svg}} \\ \\ |
| - | | **0x201** | + | |
| - | | **0x202** | + | |
| - | | **0x203** | + | |
| ===== Diagram ===== | ===== Diagram ===== | ||
| - | \\ {{: | + | \\ {{: |
| + | |||
| + | ===== Programming Example ===== | ||
| + | |||
| + | The code snippets below show how to use the DIPSW. | ||
| + | |||
| + | <code c> | ||
| + | #include " | ||
| + | |||
| + | uint8_t data_byte = CT_DIPSW-> | ||
| + | uint16_t data_hword = CT_DIPSW-> | ||
| + | uint32_t data_word = CT_DIPSW-> | ||
| + | </ | ||
| + | \\ | ||
| + | |||
| + | <code asm> | ||
| + | ADDR_DIPSW | ||
| + | |||
| + | LDR r0, =ADDR_DIPSW | ||
| + | LDRB r1, [r0, #0] ; Read byte from S7..0. | ||
| + | LDRH r1, [r0, #2] ; Read half word from S31..16. | ||
| + | LDR r1, [r0, #0] ; Read all DIPSW at once into a word. | ||
| + | </ | ||
| + | \\ | ||