Differences

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--- ctboard:peripherals:dipsw [2016/01/26 10:01] – feur
+++ ctboard:peripherals:dipsw [2022/12/27 16:38] (current) – [Registers] ruan
@@ Line 1: / Line 1: @@
-====== GPIO ======
+====== DIPSW ======
-On the CT Board are 32 DIP switches mounted. They are arranged in 4 groups of 8 DIP switches. \\
+The CT Board features 32 DIP switches. They are arranged in 4 groups of 8 DIP switches. \\
-If a DIP switch is in the position "high" (see picture below) it provides a logical **"1"**. \\
+If a DIP switch is in the position "high" (see [[#diagram]] below) it provides a logical **"1"**. \\ \\
-> Please make sure the CT Board is in the correct mode. {{ ctboard_mode_3.svg?64px}} {{ ctboard_mode_2.svg?64px}} {{ ctboard_mode_0.svg?64px}}
+> {{ctboard:ctboard_mode_1.svg?48px }} {{ctboard:ctboard_mode_2.svg?48px }} {{ctboard:ctboard_mode_3.svg?48px }} {{ctboard:ctboard_mode_4.svg?48px }} Please make sure the CT Board is in the correct mode.
-> Supported modes: **1**, **2**, **3**
+> Supported [[ctboard:mode_switch|modes]]: **1**, **2**, **3**, **4**
->
+\\
+===== Registers =====
+The registers are read only.
+\\ {{ctboard_dipsw_reg.svg}} \\ \\
+===== Diagram =====
+\\ {{:ctboard:peripherals:ctboard_dipsw.svg?700em}} \\ \\
+===== Programming Example =====
+The code snippets below show how to use the DIPSW.
+<code c>
+#include "reg_ctboard.h"
+uint8_t data_byte = CT_DIPSW->BYTE.S7_0;       /* Read byte from S7..0. */
+uint16_t data_hword = CT_DIPSW->HWORD.S31_16;  /* Read half word from S31..16. */
+uint32_t data_word = CT_DIPSW->WORD;           /* Read all DIPSW at once into a word. */
+</code>
+\\
+<code asm>
+ADDR_DIPSW      EQU      0x60000200
+                LDR      r0, =ADDR_DIPSW
+                LDRB     r1, [r0, #0]          ; Read byte from S7..0.
+                LDRH     r1, [r0, #2]          ; Read half word from S31..16.
+                LDR      r1, [r0, #0]          ; Read all DIPSW at once into a word.
+</code>
+\\